Did I Design the World's Smallest Rocket Flight Computer?

Six months ago, I built a flight computer in two weeks. Using what I’ve learned from that project, I’ve designed a new flight computer that I believe to be the world’s smallest, measuring just 10 x 10mm. The current record seems to be a 16 x 17mm computer built by Joe at BPS.Space. Mine is 36% the size of his. Joe’s build was focused on a compact way to achieve thrust-vector control. Mine is designed to go on more traditional hobby rockets, so I haven’t included PWM servo outputs–giving me space to add 16 MB of onboard flash.

The flight computer features an STM32L4 microcontroller and a flash chip running in Quad-SPI. Because the STM32L4 supports QSPI and DMA, data can be quickly moved to flash without stalling loops.

The board also uses the LPS22DF barometer and the LSM6DSV320X IMU, which combines two accelerometers into one IC. This feature allows it to collect high-precision data at low acceleration without clipping during launch–a problem I ran into on my original computer. One accelerometer will be capable of ±16g while the other can go up to ±320g.

Power and data share one connector. When the board is on the rocket, a 1s or 2s LiPo can be plugged straight into the Molex connector. To remove flight logs from it, a custom USB-Molex cable will be used to both power it and communicate with it straight over the STM32’s D+/D- pins. I have exposed SWD pads on the back for debugging that are accessible using a pogo pin clip.

Because of the board’s low power draw and interrupt-driven logging, the LDO can handle the heat dissipation from even a 2s LiPo over the duration of a flight. My back-of-the-envelope calculation estimates heat generation at 150 mW, which isn’t a problem over a short flight.

I designed it in KiCad and used the JLCImport tool for 3D models. It’s currently being fabricated and assembled, and I plan to update this page as it progresses.

Schematic

Bill of Materials

Stackup

Routing a microcontroller, flash, sensors, and power into this small a form factor was a fun challenge. Signal traces are routed at 0.1 mm width, and power traces are 0.25 mm. Vias are 0.4 mm in diameter. To escape fine-pitch footprints, I’ve used via-in-pad.

Top Layer and Inner Layer 1

Inner Layer 2 and Bottom Layer